FIG. 1 illustrates an example of a known software GPS receiver. The illustrated receiver comprises a radio frequency (RF) module (for example, a first chip, RF receiver, RF chip or RF front-end and referred to as an RF module 1) to do the RF down conversion (via a downconverter 6) and digitization (via an analog-to-digital converter 8), and a second module 2, which is usually built around a general purpose processor or a digital signal processor (DSP) 9 and memory 10. The DSP 9 runs a program for performing the correlation and tracking procedure as well as navigation. The RF module 1 and the DSP 9 are mutually connected over a proprietary data bus 3. Solutions including both modules in a single chip have also been suggested. In some case as described below, an acquisition and navigation processor (main processor 11) computes and displays position related data.
In a GNSS system, the sources are orbiting GNSS Space Vehicles (SVs). In the case of the GPS, which is readily extendable to other radio localization systems, each space vehicle transmits two microwave carrier signals. The signal L1 at 1575.42 MHz carries the navigation message. The signal L2 at 1227.60 MHz is used among others to measure the ionospheric delay. The L1 and/or L2 signals are modulated with three binary codes:
The C/A Code (Coarse Acquisition) modulates the phase of the L1 carrier signal. The C/A code is a Pseudo Random Noise signal (PRN signal) at 1 MHz that repeats every 1023 bits (1 millisecond). Each SV uses a different C/A code. This noise-like code spreads the spectrum of the modulated signal over a 1 MHz bandwidth to improve immunity against noise.
The navigation message also modulates the L1-C/A code signal. It is a 50-Hz signal consisting of data bits that describe the GPS satellite orbits, clock corrections and other system parameters.
The P-Code (precise) modulates both the L1 and the L2 signals, and is for use by only authorized users with cryptographic keys.
The task of a GPS receiver is to retrieve the signals received from the various space vehicles that can be seen at a given instant. For that task, the circuit of FIG. 1 comprises an external GPS antenna 4 whose output signal is amplified in the RF module 1 by a low-noise amplifier 5 and down-converted to an intermediate frequency signal (IF signal) in the downconverter 6 (for example, a conversion unit), before being fed to the carrier removal stage 7. The IF signal often comprises one in-phase (I) and one quadrature (Q) component, which are converted by analog-to-digital converter 8 into I/Q digital signals delivered over a proprietary data bus 3 to the second module 2 for further processing.
The function of the second module 2 (which acts as a correlator and de-spreader) is to de-spread the I/Q signals delivered by the RF module 1 originating from the various SVs. To correlate, the second module 2 temporally aligns the incoming signals with locally generated copies of the PRN signals of each existing or likely SV. This correlation may occur in the time domain using time-domain correlation techniques using parallel multiplication and summations. In order to reduce the computation overhead and the acquisition time, alignment is often performed in the frequency domain, by correlating a Fast Fourier Transform (FFT) transform of the incoming I/Q signals with FFT transforms of the PRN signals characterizing each SV. There are various algorithms used by different manufacturers for carrying out this correlation in the time or frequency domain. It is however due to the fact that the correlation and de-spreading processes tend to require a lot of processing power. For example, a correlation in the frequency domain requires a lot of processing power for the computation of FFTs, multiplication by the complex conjugates of the CA Codes, and inverse FFT on the results that are needed for a fast time-to-frequency conversion.
In addition to the processing requirements, this process also requires a large amount of storage for data and results.
The second module 2 outputs digital processed data that are fed over the proprietary data bus 3 to an acquisition and navigation processor (main processor 11) for computing and for displaying position related data, including for example the position of the receiver. The nature of the data output by the second module depends on the receiver; some modules already deliver the location coordinates while others only deliver intermediary values such as pseudo ranges of the orbiting SVs.
In the prior art, the second module 2 is often built around a general purpose or DSP 9 accessing its own data and instruction memory 10. Examples of known correlators include the NJ1030 and NJ2020 baseband processors produced by NemeriX.
It is also known to use an FPGA or a dedicated ASIC as a correlator for computing the FFTs and for the various other computations performed by the second module 2.
Processors, ASICs and FPGA, however, are expensive, power and space consuming, therefore, the hardware resources required in the second module 2 for the correlation and tracking procedures have a significant impact on the price, volume and power-consumption of the overall receiver. Additionally these resources are often dedicated to the GPS algorithm and cannot be used for other purposes even when they are no longer required by the GPS function.
It has also been suggested to use a general purpose CPU in the system for the computation of the FFT required for the correlation. Although general purpose CPUs are fast, the total system throughput is often not fast enough. Moreover, this solution makes an inefficient use of the available memory bandwidth and puts a high load on the CPU, thus, blocking it from other tasks.
It is therefore a goal of the present invention to provide the digital processing power required by a radio positioning signal receiver in a less expensive, less power-consuming and less space consuming way than in the prior art, and in a manner which efficiently shares the resources so that they can also be used for other system functions when not required by the navigation functions.